We present verification protocols to gain confidence in the correct performance of a device implementing an arbitrary quantum computation. The derivation of the protocols is based on the fact that matchgate computations, which are classically efficiently simulable, become universal if supplemented with additional resources. We combine tools from weak simulation, randomized compiling, and statistics to derive verification circuits that (i) strongly resemble the original circuit and (ii) can be classically efficiently simulated not only in the ideal, i.e., error free scenario, but also in the realistic situation where errors are present. In fact, in one of the protocols we apply exactly the same circuit as in the original computation, however, to a slightly modified input state.